Let R1 and R2 be two 4-bit registers storing numbers in 2's complement form. For the operation R1+R2

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Question

Let R1 and R2 be two 4-bit registers storing numbers in 2's complement form. For the operation R1+R2, which one of the following values gives an arithmetic overflow?

Accepted Answer

Correct Answer: (B) R1=1100 and R2=1010Concept -- 2's Complement Overflow Detection (from Patterson and Hennessy, Computer Organization and Design):4-bit 2's complement range: -8 to +7. Overflow occurs when two numbers of the same sign are added and the result has the opposite sign, or equivalently when carry into the sign bit != carry out of the sign bit.Option (A): 1011 = -5, 1110 = -2. Sum = -7 = 1001. No overflow (-7 is in range).Option (B): 1100 = -4, 1010 = -6. Sum = -10. But -10 is outside [-8,+7]. Binary: 1100 + 1010 = 10110. Taking 4 bits: 0110 = +6. The result is +6 but should be -10. Overflow! (Two negatives sum to a positive.)Option (C): 0011 = +3, 0100 = +4. Sum = +7 = 0111. No overflow (+7 is in range).Option (D): 1001 = -7, 1111 = -1. Sum = -8 = 1000. No overflow (-8 is the minimum representable value, still in range).

Let R1 and R2 be two 4-bit registers storing numbers in 2's complement form. For the operation R1+R2, which one of the following values gives an arithmetic overflow?

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Let R1 and R2 be two 4-bit registers storing numbers in 2's complement form. For the operation R1+R2, which one of the following values gives an arithmetic overflow?

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